This paper proposes a programmable inhibitory interconnection network between pixels in an array of novel low-voltage Schmitt-trigger-based PFM sensors that will be of interest for future applications in memristor-based early vision processing. In addition, a new low-power inverter-based pulse-frequency modulation (PFM) design and its integration with the network is also presented. To ensure no change in the memristors conductance in the network, the CMOS imager was designed for low voltage operation. That has resulted in a significant power reduction, better than 60%, and a comparable linear dynamic range when compared to published designs in the literature. The design was performed using a 0.13 um Samsung Electronics standard CMOS process, using 0.75 V supply voltage.