Thermal Barrier Phase Change Memory

ACS Appl Mater Interfaces. 2019 Feb 6;11(5):5336-5343. doi: 10.1021/acsami.8b18473. Epub 2019 Jan 24.

Abstract

Phase change memory is widely considered as the most promising candidate as storage class memory (SCM), bridging the performance gaps between dynamic random access memory and flash. However, high required operation current remains the major limitation for the SCM application, even after using defect engineering materials, for example, Ti-doped Sb2Te3. Here, we demonstrate that ∼87% current can be reduced by spatially separating Sb2Te3 and TiTe2 layers, thanks to semimetallic TiTe2 serving as a thermal barrier in the reset process. Moreover, the stable crystalline TiTe2 layer provides an ordered interface to speed up the crystallization process of the amorphous Sb2Te3 layer, enabling ∼10 ns ultrafast crystallization speed. An outstanding device lifetime, up to ∼2 × 107 cycles, has been obtained, which is twice as long as that of alloy-based cells. Correlative electron microscopy and atom probe tomography provide evidence that the TiTe2/Sb2Te3 multilayer can keep a layer-stacked structure, avoiding phase segregation found in alloys and strong element intermixing in the GeTe/Sb2Te3 superlattice, which enables excellent cyclability. This study suggests that adding a semimetallic layer in the phase change layer, such as TiTe2 and TiSe2, can yield a phase change memory with superior properties.

Keywords: TiTe2; TiTe2/Sb2Te3; Ti−Sb−Te; atom probe tomography; high endurance; low energy consumption; thermal barrier phase change material.